Semiconductor fabrication processes are multi-step processes that are used to create integrated circuits (ICs) that are used in a variety of applications. The process begins with the epitaxial growth of the wafer followed by many processing steps, such as deposition processes (e.g., chemical vapor deposition, molecular beam epitaxy, physical vapor deposition, atomic layer deposition), removal processes (e.g., wet etching, plasma etching, chemical-mechanical planarization), patterning processes (photolithography), and electrical property modification processes (e.g., diffusion, ion implantation). Typically, hundreds of such processing steps are performed to fabricate a wafer.
After the wafers have been fabricated, they are typically subjected to a variety of tests to verify that the wafers and the ICs formed on them meet certain standards. After testing, the wafers are diced to divide each wafer into many individual dies. Each die corresponds to an IC chip that will later be packaged in an IC package that is ready for use. Different dicing techniques are used, such as scoring and breaking, sawing, laser cutting, and etching.
With respect to scribing and breaking or sawing, it is difficult to achieve side walls for the dies that are very smooth. Rather, the side walls of the dies are often rough or jagged, which can eventually lead to mechanical defects being formed in the dies (e.g., through chipping or cracking). For example, typical sawing or cutting techniques can result in variations greater than 10 micrometers (microns) from die to die. In recent years, plasma etching tools and techniques have been used to perform the dicing operations on wafers. Using plasma etching for this purpose enables very precise dimensions for the dies to be obtained and can result in the dies having very smooth side walls.